Dgipro Systems Pvt Ltd

Dgipro Systems Pvt Ltd Jobs

Industry : IT- Embedded EDA VLSI

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One Response to “Dgipro Systems Pvt Ltd”

  1. Manpreet Kaur says:

    Experience Summary

    2.7 years of experience in ASIC design, currently working as Design Engineer, in Texas Instruments, Bangalore, since June 2006.
    Knowledge and experience in Formal verification, Synthesis, STA, of very high speed DSP based low power ASICs in 45/90nm technology.

    Skill set:

    Synthesis tool Synopsys – Design Compiler
    Logic verification tool Atrenta – SpyGlass
    STA Synopsys – PrimeTime
    Simulation Tools Modelsim Compiler
    Functional Equivalence Checking Tools Synopsys – Formality
    Cadence – Logic Equivalence Checker
    Cadence – Conformal low power
    Scripting language TCL, Perl (basic knowledge)
    HDL language: Verilog, VHDL

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